1. Field of the Invention
The present invention relates to system memory maps. In one example, the present invention relates to methods and apparatus for optimizing decoder logic associated with a system memory map.
2. Description of Related Art
Conventional processing systems include a variety of components. Master components such as processors and Ethernet components are configured to access a variety of slave components such as memory, timers, interface ports, etc. Master components are typically operable to access slave components by using a system memory map.
A system memory map shows a variety of components assigned to various address ranges within system memory. To access a particular slave component, a processor can perform read and write accesses to a particular range of addresses in memory. In conventional systems, decoder logic performs address comparisons to determine what component is being accessed.
However, conventional mechanisms for performing decoder operations are inefficient. Consequently, it is desirable to provide improved methods and apparatus for implementing decoder logic for handling system memory maps.